It is understood in the art of interfacing digital electronic devices that a host device (“host”) and a slave device (“slave”) must be compatible with each other in the time domain, that is, the slave must be able to accept data within a certain time period prescribed by the host during a write operation; and, similarly, the slave must be able to return data within a certain time period prescribed by the host during a read operation. The term “latency” is used in the art and herein to refer to the time interval between when a process starts and when it finishes. With respect to a host, latency refers to the overall time period required for the host to perform a read/write operation or “cycle.” With respect to a slave, latency refers to the time period between when a slave receives a request and when it completes the request: for read operations, latency refers to the time period between when a slave receives a read request and when it outputs the data onto a data bus; and for write operations, latency refers to the time period between when a slave receives a write request and when it stores the data internally. Thus, another way of saying that the slave must be able to accept or return data within a certain time period prescribed by the host is to say that the slave is required to have a latency that is less than or equal to the latency of the host.
Many slaves, however, are capable of accepting or returning data only with a latency that is greater than the latency of the host. An example of this type of slave is a memory device. In a typical host read cycle, the host requests data and, after a time delay, reads the data. If the slave's latency is greater than the host's, the host will complete its read cycle before the slave places the requested data on its outputs. It should be clear that if the host is allowed to complete its read cycle before the requested data is on the slave's outputs, the host will read incorrect data.
One possible solution is to this problem is to speed up the slave by increasing the frequency at which it is clocked. However, increasing the clock frequency increases power consumption and heat generation. This translates into shorter battery life in mobile devices as well as the need to include means to dissipate the additional heat. In addition, increasing the clock frequency can produce electromagnetic radiation which interferes with other devices and can create clock synchronization and timing problems.
Several methods are generally employed for interfacing a host to a slave having a latency greater than that of the host. In one method, usually referred to as polling, the host makes a read or write request. The host then executes a program loop that repeatedly reads and tests a port line or a register until it detects a signal or a code sent by the slave to indicate that the slave has completed the request and that the data is available at a specified memory or register address.
In another method for interfacing a host to a slave having a latency greater than that of the host, usually referred to as the interrupt method, the host makes a read or write request to a slave and when the slave has completed the request, the slave asserts a signal on an input pin or line on the host for receiving an interrupt signal. The signal indicates to the host that the slave has completed the request and, in the case of a read operation, that the data is available to be read.
A third method for interfacing a host and to a slave having a latency greater than that of the host is usually referred to as the single handshake method. This method is typically used to prevent a host from completing a read/write cycle until such time as the slave is ready. In the single handshake method, the host has an input for a “hold-off” signal, such as WAIT or a continuation signal, such as ACK. In the case of a WAIT implementation, the host starts a read/write cycle and the slave responds by asserting a WAIT signal which is sent to the host's hold-off input. After the slave completes the request, the slave de-asserts the WAIT signal which allows the host to complete the read/write cycle. In the case of an implementation using a continuation signal, the host starts a read/write cycle, but does not complete it until it receives an ACK signal from the slave.
In the polling, interrupt, and handshake methods, when the host receives an indication from the slave that the slave has completed its part of the read/write cycle, the host finishes its part in the cycle, such as by reading the requested data. In effect, these methods extend the time period required for the host to perform a read/write cycle, that is, each method extends the latency of the host. More elaborate methods for interfacing a host to a slave are known, but these methods generally represent extensions of the basic methods described above for extending the latency of the host.
The techniques for extending the latency of the host and the method of speeding up the slave may not be desirable or possible in some computer systems. As mentioned, making the slave faster by increasing the frequency at which it is clocked increases power consumption, heat generation, and can produce electromagnetic interference. In addition, slave devices generally have an upper limit at which they can be clocked and still function correctly. The polling method is undesirable because it wastes CPU cycles which, in turn, wastes power and degrades system performance. The interrupt and handshake methods cannot be employed unless the host has an input for an interrupt or a hold-off signal. Some hosts are specifically designed without an input for an interrupt or a hold-off signal, that is, with a fixed latency, in an effort to minimize cost and power consumption. Thus, a significant problem is encountered when interfacing a fixed latency host to a slave having a latency greater than the latency of the host because the techniques for extending the latency of the host are not possible and the method of speeding up the slave may not be desirable or possible.
In view of the foregoing, it would be desirable to have an interface between a host and a slave having a latency greater than the latency of the host that could be used with a fixed latency host when the method of speeding up the slave is not be desirable or possible.